Pin Definition

Connectors
The core board connects to the base board through the following Panasonic board-to-board connectors:
| Connector | Model | Mating Connector Model |
|---|---|---|
| J1, J2, J3 | Panasonic AXK600337YG | AXK500137YG |
| J4 | Panasonic AXK680337YG | AXK580137YG |
J1 Pin Definition
| PIN# | Pin Signal | I/O | Description | Notes |
|---|---|---|---|---|
| 88,90,92,94,96,98,100 | USB_VBUS | PI/PO | USB_VBUS, supports QC5.0 fast charge input, voltage range 3.7 V to 21.5 V | |
| 85,87,89,91,93,95,97,99 | VBATT | PI | Core board power supply, voltage range 3.5 to 4.2 V | |
| 84,86 | VREG_BOB1 | PO | Core board output BUCK OR BOOST, powers CODEC IC | |
| 1,2,24,27,44,50,51,55,59,74,76,77,78,79,80,81,82,83 | GND | G | Digital ground | |
| 75 | VCOIN | PI/PO | RTC backup power | |
| 73 | VBATT_CONN_VSENSE_P | AI | Battery voltage sense signal | |
| 71 | VBATT_CONN_VSENSE_M | AI | Battery voltage sense signal | |
| 72 | PM8550_THERM1 | AI | PM8550 ADC1 | |
| 70 | PM8550_THERM4 | AI | PM8550 ADC4 | |
| 69 | VBATT_PACK_SNS_M | AI | Remote sense for second cell voltage in 1S2P battery | |
| 67 | BATT_ID | AI | Battery identification, detection, and BSI communication | |
| 65 | BATT_THERM | AI | Battery temperature sensor | |
| 63 | USB0_THERM | AI | Type-C temperature sensor | |
| 61 | USB_LD_SW_EN | I/O | PM8550B GPIO03 | |
| 66,68 | VREG_S6G_1P86 | PO | 1.8 V output | |
| 64 | VREG_L8B_1P8 | PO | 1.8 V output | SD card level shifter power |
| 62 | VREG_L6B_1P8 | PO | 1.8 V output | |
| 60 | VREG_1P2_SYS | PO | 1.2 V output | SD card level shifter power |
| 58 | VREG_L13B_3P0 | PO | 3 V output | |
| 56 | VREG_L14B_3P2 | PO | 3 V output | |
| 54 | VREG_L15B_1P8 | PO | 1.8 V output | |
| 52 | VREG_L16B_2P8 | PO | 2.8 V output | |
| 48 | USB0_HS_DM | I/O | USB0 data - | USB 2.0 OTG |
| 46 | USB0_HS_DP | I/O | USB0 data + | USB 2.0 OTG |
| 57 | PMK_CLK7_LN | AO | Reserved 38.4 MHz clock output | |
| 53 | SLEEP_CLK | AO | 32.7645 kHz clock output | WiFi sleep clock |
| 49 | AOSS_SLEEP_INDICATOR | AI | Reserved Always-On SubSystem sleep detection signal | |
| 47 | GPIO4_I2C1_SDA | OD | General-purpose I2C bus, 1.8 V level | |
| 45 | GPIO5_I2C1_SCL | OD | General-purpose I2C bus, 1.8 V level | |
| 43 | GPIO14* | DI | GPIO14, 1.8 V level | |
| 42 | PM_CBL_PWR_N | I/O | Boot config signal, auto power-on | Active low |
| 41 | GPIO16* | I/O | GPIO16, 1.8 V level | |
| 40 | KPD_PWR_N | DI | Power on/off signal, active low | |
| 39 | GPIO17* | I/O | GPIO17, 1.8 V level | |
| 38 | PM_RESIN_N | DI | Reset signal, active low | |
| 37 | GPIO18* | I/O | GPIO18, 1.8 V level | |
| 36 | PM_KYPD_VOLP_N | DI | Volume control signal | |
| 35 | GPIO19* | I/O | GPIO19, 1.8 V level | |
| 34 | GPIO7 | I/O | GPIO7, 1.8 V level | Camera power control signal |
| 33 | GPIO20_I2C_SDA | OD | General-purpose I2C bus, 1.8 V level | |
| 31 | GPIO21_I2C_SDA | OD | General-purpose I2C bus, 1.8 V level | |
| 32 | GPIO8* | DI | GPIO8, 1.8 V level | |
| 30 | GPIO6 | DO | GPIO6, 1.8 V level | |
| 29 | PM8550_PWM_OUT_GPIO9 | DO | PM8550 PWM4 | For eDP/MIPI LCM backlight adjustment |
| 28 | USB0_OVP_SNS | AI | USB charging overvoltage detection | |
| 26 | USB0_OVP_DRV | AO | USB overvoltage protection FET drive signal | |
| 25 | DSI0_NC_CLK1_M | AO | MIPI DSI0 clock signal | For Split-link |
| 23 | DSI0_NC_CLK1_P | AO | MIPI DSI0 clock signal | For Split-link |
| 21 | DSI0_NC_LN3_M | AO | MIPI DSI0 data signal | DSI0 |
| 19 | DSI0_C2_LN3_P | AO | MIPI DSI0 data signal | DSI0 |
| 17 | DSI0_C1_CLK_M | AO | MIPI DSI0 clock signal | DSI0 |
| 15 | DSI0_B1_CLK_P | AO | MIPI DSI0 clock signal | DSI0 |
| 13 | DSI0_A0_LN0_P | AO | MIPI DSI0 data signal | DSI0 |
| 11 | DSI0_B0_LN0_M | AO | MIPI DSI0 data signal | DSI0 |
| 9 | DSI0_B2_LN2_M | AO | MIPI DSI0 data signal | DSI0 |
| 7 | DSI0_A2_LN2_P | AO | MIPI DSI0 data signal | DSI0 |
| 5 | DSI0_C0_LN1_P | AO | MIPI DSI0 data signal | DSI0 |
| 3 | DSI0_A1_LN1_M | AO | MIPI DSI0 data signal | DSI0 |
| 22 | DSI1_A0_LN0_P | AO | MIPI DSI1 data signal | DSI1 |
| 20 | DSI1_B0_LN0_M | AO | MIPI DSI1 data signal | DSI1 |
| 18 | DSI1_C0_LN1_P | AO | MIPI DSI1 data signal | DSI1 |
| 16 | DSI1_A1_LN1_M | AO | MIPI DSI1 data signal | DSI1 |
| 14 | DSI1_B1_CLK_P | AO | MIPI DSI1 clock signal | DSI1 |
| 12 | DSI1_C1_CLK_M | AO | MIPI DSI1 clock signal | DSI1 |
| 10 | DSI1_C2_LN3_P | AO | MIPI DSI1 data signal | DSI1 |
| 8 | DSI1_NC_LN3_M | AO | MIPI DSI1 data signal | DSI1 |
| 6 | DSI1_B2_LN2_M | AO | MIPI DSI1 data signal | DSI1 |
| 4 | DSI1_A2_LN2_P | AO | MIPI DSI1 data signal | DSI1 |
J2 Pin Definition
| PIN# | Pin Signal | I/O | Description | Notes |
|---|---|---|---|---|
| 1 | GPIO63_UART3_RXD | DI | UART data input, 1.8 V level | General-purpose UART |
| 3 | GPIO62_UART3_TXD | DO | UART data output, 1.8 V level | General-purpose UART |
| 2 | GPIO71_UART4_RXD | DI | UART data input, 1.8 V level | General-purpose UART |
| 4 | GPIO70_UART4_TXD | DO | UART data output, 1.8 V level | General-purpose UART |
| 5 | GPIO61 | I/O | GPIO61, 1.8 V level | |
| 6 | GPIO69 | I/O | GPIO69, 1.8 V level | |
| 7* | GPIO60 | I/O | GPIO60, 1.8 V level | |
| 8 | GPIO68 | I/O | GPIO68, 1.8 V level | |
| 9 | GPIO119_UART8_RXD | DI | UART data input, 1.8 V level | General-purpose UART |
| 11 | GPIO118_UART8_TXD | DO | UART data output, 1.8 V level | General-purpose UART |
| 10 | GPIO67_SPI_CSN | DO | SPI chip select, 1.8 V level | General-purpose SPI |
| 12 | GPIO66_SPI_CLK | DO | SPI clock, 1.8 V level | General-purpose SPI |
| 14 | GPIO65_SPI_MOSI | DO | SPI MOSI, 1.8 V level | General-purpose SPI |
| 16 | GPIO64_SPI_MISO | DI | SPI MISO, 1.8 V level | General-purpose SPI |
| 13 | GPIO120_CAM4_RST_N | DO | Camera 4 reset, 1.8 V level | RST for CSI4 |
| 15 | GPIO122_CAM3_RST_N | DO | Camera 3 reset, 1.8 V level | RST for CSI3 |
| 17 | GPIO121_CAM2_RST_N | DO | Camera 2 reset, 1.8 V level | RST for CSI2 |
| 19 | GPIO117_CAM1_RST_N | DO | Camera 1 reset, 1.8 V level | RST for CSI1 |
| 21 | GPIO116_CAM0_RST_N | DO | Camera 0 reset, 1.8 V level | RST for CSI0 |
| 18,20 | VREG_L9B_2P9 | PO | 1.8/2.95 V output | TF card power |
| 22 | SDC2_CD_N | DI | SD card detect, active low | TF card |
| 24 | SDC2_DATA_3_1V2 | I/O | SD data line, 1.2 V level | TF card |
| 26 | SDC2_DATA_2_1V2 | I/O | SD data line, 1.2 V level | TF card |
| 28 | SDC2_DATA_1_1V2 | I/O | SD data line, 1.2 V level | TF card |
| 30 | SDC2_DATA_0_1V2 | I/O | SD data line, 1.2 V level | TF card |
| 32 | SDC2_CMD_1V2 | I/O | SD command line, 1.2 V level | TF card |
| 34 | SDC2_CLK_1V2 | DO | SD clock line, 1.2 V level | TF card |
| 23 | AON_CCI_I2C_SDA3 | I/O | Camera-dedicated I2C | AON, for CSI4 |
| 25 | AON_CCI_I2C_SCL3 | I/O | Camera-dedicated I2C | AON, for CSI4 |
| 27 | CCI_I2C_SDA2 | I/O | Camera-dedicated I2C | For CSI3 |
| 29 | CCI_I2C_SCL2 | I/O | Camera-dedicated I2C | For CSI3 |
| 31 | CCI_I2C_SDA1 | I/O | Camera-dedicated I2C | For CSI2 |
| 33 | CCI_I2C_SCL1 | I/O | Camera-dedicated I2C | For CSI2 |
| 35 | CCI_I2C_SDA0 | I/O | Camera-dedicated I2C | For CSI0/1 |
| 37 | CCI_I2C_SCL0 | I/O | Camera-dedicated I2C | For CSI0/1 |
| 41 | CAM_AON_MCLK4 | DO | Camera master clock | AON, for CSI4 |
| 43 | CAM_MCLK3 | DO | Camera master clock | For CSI3 |
| 45 | CAM_MCLK2 | DO | Camera master clock | For CSI2 |
| 47 | CAM_MCLK1 | DO | Camera master clock | For CSI1 |
| 49 | CAM_MCLK0 | DO | Camera master clock | For CSI0 |
| 53 | CSI3_C2_LN3_M | AO | MIPI CSI3 data signal | 4-Lane |
| 55 | CSI3_B2_LN3_P | AO | MIPI CSI3 data signal | 4-Lane |
| 57 | CSI3_A2_LN2_M | AO | MIPI CSI3 data signal | 4-Lane |
| 59 | CSI3_C1_LN2_P | AO | MIPI CSI3 data signal | 4-Lane |
| 61 | CSI3_B1_LN1_M | AO | MIPI CSI3 data signal | 4-Lane |
| 63 | CSI3_A1_LN1_P | AO | MIPI CSI3 data signal | 4-Lane |
| 65 | CSI3_C0_LN0_M | AO | MIPI CSI3 data signal | 4-Lane |
| 67 | CSI3_B0_LN0_P | AO | MIPI CSI3 data signal | 4-Lane |
| 71 | CSI3_A0_CLK_M | AO | MIPI CSI3 clock signal | 4-Lane |
| 73 | CSI3_NC_CLK_P | AO | MIPI CSI3 clock signal | 4-Lane |
| 77 | CSI1_C2_LN3_M | AO | MIPI CSI1 data signal | 4-Lane |
| 79 | CSI1_B2_LN3_P | AO | MIPI CSI1 data signal | 4-Lane |
| 81 | CSI1_A2_LN2_M | AO | MIPI CSI1 data signal | 4-Lane |
| 83 | CSI1_C1_LN2_P | AO | MIPI CSI1 data signal | 4-Lane |
| 85 | CSI1_B1_LN1_M | AO | MIPI CSI1 data signal | 4-Lane |
| 87 | CSI1_A1_LN1_P | AO | MIPI CSI1 data signal | 4-Lane |
| 89 | CSI1_C0_LN0_M | AO | MIPI CSI1 data signal | 4-Lane |
| 91 | CSI1_B0_LN0_P | AO | MIPI CSI1 data signal | 4-Lane |
| 95 | CSI1_A0_CLK_M | AO | MIPI CSI1 clock signal | 4-Lane |
| 97 | CSI1_NC_CLK_P | AO | MIPI CSI1 clock signal | 4-Lane |
| 38 | CSI4_C2_LN3_M | AO | MIPI CSI4 data signal | AON, 4-Lane |
| 40 | CSI4_B2_LN3_P | AO | MIPI CSI4 data signal | AON, 4-Lane |
| 42 | CSI4_A2_LN2_M | AO | MIPI CSI4 data signal | AON, 4-Lane |
| 44 | CSI4_C1_LN2_P | AO | MIPI CSI4 data signal | AON, 4-Lane |
| 46 | CSI4_B1_LN1_M | AO | MIPI CSI4 data signal | AON, 4-Lane |
| 48 | CSI4_A1_LN1_P | AO | MIPI CSI4 data signal | AON, 4-Lane |
| 50 | CSI4_C0_LN0_M | AO | MIPI CSI4 data signal | AON, 4-Lane |
| 52 | CSI4_B0_LN0_P | AO | MIPI CSI4 data signal | AON, 4-Lane |
| 56 | CSI4_A0_CLK_M | AO | MIPI CSI4 clock signal | AON, 4-Lane |
| 58 | CSI4_NC_CLK_P | AO | MIPI CSI4 clock signal | AON, 4-Lane |
| 62 | CSI2_C2_LN3_M | AO | MIPI CSI2 data signal | 4-Lane |
| 64 | CSI2_B2_LN3_P | AO | MIPI CSI2 data signal | 4-Lane |
| 66 | CSI2_A2_LN2_M | AO | MIPI CSI2 data signal | 4-Lane |
| 68 | CSI2_C1_LN2_P | AO | MIPI CSI2 data signal | 4-Lane |
| 70 | CSI2_B1_LN1_M | AO | MIPI CSI2 data signal | 4-Lane |
| 72 | CSI2_A1_LN1_P | AO | MIPI CSI2 data signal | 4-Lane |
| 74 | CSI2_C0_LN0_M | AO | MIPI CSI2 data signal | 4-Lane |
| 76 | CSI2_B0_LN0_P | AO | MIPI CSI2 data signal | 4-Lane |
| 80 | CSI2_A0_CLK_M | AO | MIPI CSI2 clock signal | 4-Lane |
| 82 | CSI2_NC_CLK_P | AO | MIPI CSI2 clock signal | 4-Lane |
| 86 | CSI0_B1_LN1_M | AO | MIPI CSI0 data signal | 2-Lane |
| 88 | CSI0_A1_LN1_P | AO | MIPI CSI0 data signal | 2-Lane |
| 90 | CSI0_C0_LN0_M | AO | MIPI CSI0 data signal | 2-Lane |
| 92 | CSI0_B0_LN0_P | AO | MIPI CSI0 data signal | 2-Lane |
| 96 | CSI0_A0_CLK_M | AO | MIPI CSI0 clock signal | 2-Lane |
| 98 | CSI0_NC_CLK_P | AO | MIPI CSI0 clock signal | 2-Lane |
| 36,39,51,54,60,69,75,78,84,93,94,99,100 | GND | G | Digital ground |
J3 Pin Definition
| PIN# | Pin Signal | I/O | Description | Notes |
|---|---|---|---|---|
| 1 | DEBUG_UART_TX | DO | UART data output, 1.8 V level | Debug UART |
| 3 | DEBUG_UART_RX | DI | UART data input, 1.8 V level | Debug UART |
| 5 | GPIO30_UART1_TXD | DO | UART data output, 1.8 V level | General-purpose UART |
| 7 | GPIO31_UART1_RXD | DI | UART data input, 1.8 V level | General-purpose UART |
| 2 | GPIO36_SPI_MISO | DI | SPI MISO, 1.8 V level | General-purpose SPI |
| 4 | GPIO37_SPI_MOSI | DO | SPI MOSI, 1.8 V level | General-purpose SPI |
| 6 | GPIO38_SPI_CLK | DO | SPI clock, 1.8 V level | General-purpose SPI |
| 8 | GPIO39_SPI_CSN | DO | SPI chip select, 1.8 V level | General-purpose SPI |
| 10 | GPIO42_INT_N* | I/O | GPIO42, 1.8 V level | |
| 9 | GPIO56_INT_N* | I/O | GPIO56, 1.8 V level | |
| 15 | GPIO32_SPI_MISO | DI | SPI MISO, 1.8 V level | General-purpose SPI |
| 17 | GPIO33_SPI_MOSI | DO | SPI MOSI, 1.8 V level | General-purpose SPI |
| 19 | GPIO34_SPI_CLK | DO | SPI clock, 1.8 V level | General-purpose SPI |
| 21 | GPIO35_SPI_CSN | DO | SPI chip select, 1.8 V level | General-purpose SPI |
| 11 | GPIO28* | DO | GPIO28, 1.8 V level | |
| 13 | GPIO29 | DO | GPIO29, 1.8 V level | |
| 12 | GPIO40* | DO | GPIO40, 1.8 V level | |
| 14 | GPIO41* | DO | GPIO41, 1.8 V level | |
| 16 | GPIO44_TP_I2C_SDA | I/O | General-purpose I2C bus, 1.8 V level | I2C touch communication |
| 18 | GPIO45_TP_I2C_SCL | DO | General-purpose I2C bus, 1.8 V level | I2C touch communication |
| 20 | GPIO133* | I/O | GPIO133, 1.8 V level | |
| 22 | GPIO137* | I/O | GPIO137, 1.8 V level | |
| 24 | GPIO25_TP_INT* | DI | GPIO25, 1.8 V level | I2C touch interrupt |
| 26 | GPIO24_TP_RST | DO | GPIO24, 1.8 V level | I2C touch reset |
| 23 | FORCE_USB_BOOT | DI | Flashing mode signal | |
| 25 | GPIO_188_I2C_SDA | I/O | General-purpose I2C bus, 1.8 V level | |
| 27 | GPIO_189_I2C_SCL | DO | General-purpose I2C bus, 1.8 V level | |
| 29 | GPIO125_I2S_MCLK | I/O | I2S master clock, 1.8 V level | Non-LPI I2S |
| 33 | GPIO126_I2S_SCK | I/O | I2S clock, 1.8 V level | Non-LPI I2S |
| 35 | GPIO129_I2S_WS | I/O | I2S word select, 1.8 V level | Non-LPI I2S |
| 37 | GPIO127_I2S_DATA0 | I/O | I2S data channel 0, 1.8 V level | Non-LPI I2S |
| 39 | GPIO128_I2S_DATA1 | I/O | I2S data channel 1, 1.8 V level | Non-LPI I2S |
| 30 | GPIO48* | I/O | GPIO48, 1.8 V level | |
| 32 | GPIO49 | I/O | GPIO49, 1.8 V level | |
| 34 | GPIO50_UART2_TXD | DO | UART data output, 1.8 V level | General-purpose UART |
| 36 | GPIO51_UART2_RXD | DI | UART data input, 1.8 V level | General-purpose UART |
| 38 | GPIO202 | I/O | GPIO202, 1.8 V level | |
| 40 | GPIO203* | I/O | GPIO203, 1.8 V level | |
| 41 | GPIO74_UART5_TX | DO | UART data output, 1.8 V level | General-purpose UART |
| 43 | GPIO75_UART5_RX | DI | UART data input, 1.8 V level | General-purpose UART |
| 42 | GPIO_204 | DO | GPIO204, 1.8 V level | Host wake Bluetooth signal |
| 44 | GPIO_205* | DI | GPIO205, 1.8 V level | Wi-Fi wake host signal |
| 45 | GPIO_76_BT_UART_CTS | DO | 4-wire UART, 1.8 V level | AP6275P, Bluetooth |
| 47 | GPIO_77_BT_UART_RFR | DI | 4-wire UART, 1.8 V level | AP6275P, Bluetooth |
| 49 | GPIO_78_BT_UART_TX | DO | 4-wire UART, 1.8 V level | AP6275P, Bluetooth |
| 51 | GPIO_79_BT_UART_RX | DI | 4-wire UART, 1.8 V level | AP6275P, Bluetooth |
| 46 | GPIO84* | DI | GPIO84, 1.8 V level | Bluetooth wake host signal |
| 48 | GPIO85* | I/O | GPIO85, 1.8 V level | |
| 50 | GPIO86* | I/O | GPIO86, 1.8 V level | |
| 52 | GPIO87* | I/O | GPIO87, 1.8 V level | |
| 53 | GPIO80_SPI_MISO | DI | SPI MISO, 1.8 V level | General-purpose SPI |
| 55 | GPIO81_SPI_MOSI | DO | SPI MOSI, 1.8 V level | General-purpose SPI |
| 57 | GPIO82_SPI_CLK | DO | SPI clock, 1.8 V level | General-purpose SPI |
| 59 | GPIO83_SPI_CSN | DO | SPI chip select, 1.8 V level | General-purpose SPI |
| 54 | GPIO_80 | DO | GPIO80, 1.8 V level | Wi-Fi enable signal |
| 56 | GPIO_81 | DO | GPIO81, 1.8 V level | Bluetooth enable signal |
| 58 | GPIO90 | I/O | GPIO90, 1.8 V level | |
| 60 | GPIO91 | I/O | GPIO91, 1.8 V level | |
| 61 | GPIO58_UART6_TX | DO | UART data output, 1.8 V level | General-purpose UART |
| 63 | GPIO59_UART6_RX | DI | UART data input, 1.8 V level | General-purpose UART |
| 62 | PM8010_1_RESET_N | DO | Reserved PM8010 reset signal | |
| 64 | PM8010_2_RESET_N | DO | Reserved PM8010 reset signal | |
| 67 | SM_PCIE0_RESET_N | DO | PCIe0 reset, 1.8 V level | PCIe Gen3 |
| 69 | SM_PCIE0_CLK_REQ_N | DI | PCIe0 clock request, 1.8 V level | PCIe Gen3 |
| 71 | SM_PCIE0_WAKE_N | DI | PCIe0 wake, 1.8 V level | PCIe Gen3 |
| 75 | SOM_PCIE0_RX1_P | AI | PCIe0 data input | PCIe Gen3 |
| 77 | SOM_PCIE0_RX1_M | AI | PCIe0 data input | PCIe Gen3 |
| 79 | SOM_PCIE0_RX0_M | AI | PCIe0 data input | PCIe Gen3 |
| 81 | SOM_PCIE0_RX0_P | AI | PCIe0 data input | PCIe Gen3 |
| 85 | SOM_PCIE0_REFCLK_M | DO | PCIe0 reference clock | PCIe Gen3 |
| 87 | SOM_PCIE0_REFCLK_P | DO | PCIe0 reference clock | PCIe Gen3 |
| 91 | SOM_PCIE0_TX1_M | AO | PCIe0 data output | PCIe Gen3 |
| 93 | SOM_PCIE0_TX1_P | AO | PCIe0 data output | PCIe Gen3 |
| 95 | SOM_PCIE0_TX0_M | AO | PCIe0 data output | PCIe Gen3 |
| 97 | SOM_PCIE0_TX0_P | AO | PCIe0 data output | PCIe Gen3 |
| 68 | SM_PCIE1_RESET_N | DO | PCIe1 reset, 1.8 V level | PCIe Gen4 |
| 70 | SM_PCIE1_CLK_REQ_N | DI | PCIe1 clock request, 1.8 V level | PCIe Gen4 |
| 72 | SM_PCIE1_WAKE_N | DI | PCIe1 wake, 1.8 V level | PCIe Gen4 |
| 76 | SOM_PCIE1_RX1_M | AI | PCIe1 data input | PCIe Gen4 |
| 78 | SOM_PCIE1_RX1_P | AI | PCIe1 data input | PCIe Gen4 |
| 80 | SOM_PCIE1_RX0_P | AI | PCIe1 data input | PCIe Gen4 |
| 82 | SOM_PCIE1_RX0_M | AI | PCIe1 data input | PCIe Gen4 |
| 86 | SOM_PCIE1_REFCLK_M | DO | PCIe1 reference clock | PCIe Gen4 |
| 88 | SOM_PCIE1_REFCLK_P | DO | PCIe1 reference clock | PCIe Gen4 |
| 92 | SOM_PCIE1_TX1_M | AO | PCIe1 data output | PCIe Gen4 |
| 94 | SOM_PCIE1_TX1_P | AO | PCIe1 data output | PCIe Gen4 |
| 96 | SOM_PCIE1_TX0_M | AO | PCIe1 data output | PCIe Gen4 |
| 98 | SOM_PCIE1_TX0_P | AO | PCIe1 data output | PCIe Gen4 |
| 28,31,65,66,73,74,83,84,89,90,99,100 | GND | G | Digital ground |
J4 Pin Definition
| PIN# | Pin Signal | I/O | Description | Notes |
|---|---|---|---|---|
| 1 | GPIO_47_DP_HPD | DI | DP hot-plug detect | DP specific |
| 2 | GPIO_176* | I/O | GPIO176, 1.8 V level | |
| 3 | GPIO_46* | I/O | GPIO46, 1.8 V level | |
| 4 | GPIO_175 | I/O | GPIO175, 1.8 V level | |
| 5 | GPIO_108 | I/O | GPIO108, 1.8 V level | |
| 6 | GPIO_174_I2S1_DAT1 | I/O | I2S1 data signal | LPI I2S |
| 8 | GPIO_173_I2S1_DATA0 | I/O | I2S1 data signal | LPI I2S |
| 10 | GPIO_172_I2S1_WS | DO | I2S1 word select | LPI I2S |
| 12 | GPIO_171_I2S1_CLK | DO | I2S1 clock | LPI I2S |
| 7 | GPIO55_UART_RXD | DI | UART data input, 1.8 V level | General-purpose UART |
| 9 | GPIO54_UART_TXD | DO | UART data output, 1.8 V level | General-purpose UART |
| 11 | GPIO_164_WDOG_DISABLE | I/O | Reserved config GPIO, WDOG enable | |
| 13 | GPIO183 | I/O | GPIO183, 1.8 V level | |
| 15 | GPIO182_HP_DET_L | DI | Headphone insertion detect | For WCD9385 |
| 17 | GPIO181_USB30_PWR_EN* | I/O | GPIO181, 1.8 V level | |
| 19 | GPIO180_USB20_PWR_EN | I/O | GPIO180, 1.8 V level | |
| 16 | GPIO_168_SWR_RX_CLK | DO | SoundWire RX clock | For WCD9385 |
| 18 | GPIO_169_SWR_RX_DATA0 | I/O | SoundWire RX data | For WCD9385 |
| 20 | GPIO_170_SWR_RX_DATA1 | I/O | SoundWire RX data | For WCD9385 |
| 22 | GPIO_179_SWR_TX_DATA2 | I/O | SoundWire TX data | For WCD9385 |
| 24 | GPIO_167_SWR_TX_DATA1 | I/O | SoundWire TX data | For WCD9385 |
| 26 | GPIO_166_SWR_TX_DATA0 | I/O | SoundWire TX data | For WCD9385 |
| 28 | GPIO_165_SWR_TX_CLK | DO | SoundWire TX clock | For WCD9385 |
| 23 | USB0_DP_AUX_P | I/O | DP auxiliary signal | |
| 25 | USB0_DP_AUX_N | I/O | DP auxiliary signal | |
| 29 | USB0_SS_TX1_M | AI/AO | USB 3.1 / DP output data | |
| 31 | USB0_SS_TX1_P | AI/AO | USB 3.1 / DP output data | |
| 33 | USB0_SS_TX0_M | AI/AO | USB 3.1 / DP output data | |
| 35 | USB0_SS_TX0_P | AI/AO | USB 3.1 / DP output data | |
| 39 | USB0_SS_RX0_P | AI/AO | USB 3.1 / DP input data | |
| 41 | USB0_SS_RX0_M | AI/AO | USB 3.1 / DP input data | |
| 43 | USB0_SS_RX1_P | AI/AO | USB 3.1 / DP input data | |
| 45 | USB0_SS_RX1_M | AI/AO | USB 3.1 / DP input data | |
| 32 | AON_CAM_STB1 | DO | AON CAM Standby signal | CAM |
| 34 | AON_CAM_STB0 | DO | AON CAM Standby signal | CAM |
| 36 | GPIO195_SPI_CSN | DO | SPI chip select, 1.8 V level | SSC_QUP_SPI |
| 38 | GPIO194_SPI_SCK | DO | SPI clock, 1.8 V level | SSC_QUP_SPI |
| 40 | GPIO193_SPI_MOSI | DO | SPI MOSI, 1.8 V level | SSC_QUP_SPI |
| 42 | GPIO192_SPI_MISO | DI | SPI MISO, 1.8 V level | SSC_QUP_SPI |
| 44 | GPIO191_I2C_SCL | DO | I2C clock, 1.8 V level | SSC_QUP_I2C |
| 46 | GPIO190_I2C_SDA | I/O | I2C data, 1.8 V level | SSC_QUP_I2C |
| 48 | GPIO_201* | I/O | GPIO201, 1.8 V level | |
| 50 | GPIO_200* | I/O | GPIO200, 1.8 V level | |
| 52 | GPIO_199* | I/O | GPIO199, 1.8 V level | |
| 54 | GPIO_198* | I/O | GPIO198, 1.8 V level | |
| 49 | USB0_SBU2 | I/O | USB0 SBU signal | For Type-C |
| 51 | USB0_SBU1 | I/O | USB0 SBU signal | For Type-C |
| 53 | USB0_CC2 | I/O | USB0 CC signal | For Type-C |
| 55 | USB0_CC1 | I/O | USB0 CC signal | For Type-C |
| 56 | GPIO197* | I/O | GPIO197, 1.8 V level | |
| 58 | GPIO196* | I/O | GPIO196, 1.8 V level | |
| 57 | RGB_BLUE | AO | Blue LED high-side current source | |
| 59 | RGB_GREEN | AO | Green LED high-side current source | |
| 61 | RGB_RED | AO | Red LED high-side current source | |
| 60 | GPIO_154 | I/O | GPIO198, 1.8 V level | Config pin, must not pull up during boot |
| 62 | USB0_CC_DIR | DO | Indicates Type-C connection orientation | |
| 63,65 | FLASH_LED2 | AO | Flash LED current source | |
| 67,69 | FLASH_LED1 | AO | Flash LED current source | |
| 68,70 | VPH_PWR | AO | 3.6 V output | |
| 75 | PM8550_GPIO11 | I/O | PM8550 PWM3 | |
| 73 | PM8550_GPIO8 | I/O | PM8550 GPIO | |
| 14,21,27,30,37,47,64,66,71,73,79,72,74,76,78,80 | GND | G | Digital ground |