Software Stack Overview and Architecture
Overall Distributed Architecture
A8625MY1 adopts a three-layer distributed architecture of host side + PCIe communication layer + compute card side, deeply optimized for PCIe endpoint form factors:
Host side: supports mainstream development boards such as Raspberry Pi 5 and RK3576/RK3588, responsible for business logic scheduling, data preprocessing, and result presentation.
PCIe communication layer: based on a Gen3 2Lane high-speed interface for low-latency data transfer, communicating through PCIe-to-2.5G Ethernet protocol.
Compute card side: powered by Qualcomm QCS8625 SoC, runs native Ubuntu 22.04, executes all AI workloads, and supports heterogeneous CPU/GPU/NPU (DSP) acceleration.
Core Open Boundaries
| Category | Open Content | Delivery Form |
|---|---|---|
| Open source and modifiable | Linux kernel source, BSP basic peripheral drivers, device tree configuration, all demo sample code | Public Git repository |
| Closed source invocation | AidLite inference SDK, AidGen LLM SDK, AidStream streaming SDK, AidCV image processing SDK, Aidvoice language interaction SDK | Binary libraries + unified API |
| Online services | Model Farm, AIMO model optimization platform, AI Creator visual training platform | Web access |